Electromagnetic compatibility or EMC implies that the unit is consistent with (i.e. no interference is caused by) it’s electromagnetic (EM) environment and does not emit concentrations of EM energy that trigger electromagnetic interference (EMI) in other nearby systems. EMC is connected with the generation, spread, and reception of electromagnetic energy that is not precisely the welcome personality of the PCB design. That energy outcomes owing to a blended mixture of energy producers and care must be taken to ensure that such signals are consistent and do not interfere with each other when it is essential for distinct circuits, traces, biases and PCB components to function in unison. EMI, on the other side, is an undesired, harmful effect of the EMC or an undesired energy. In such an electromagnetic environment, the objective of the PCB designer is to ensure that different energy components are lowered to preserve minimal interference impacts. Here are some tips on how to prevent these issues in the design of your printed circuit board.
PCB Layout rules for the achievement of EMC criteria
- Trace lengths carrying high-speed digital signals or clocks should be minimized.
- The length of the traces connected directly to the connectors (I / O traces) should be minimized.
- Signals with a high-frequency content should not be routed under the parts used for the I / O board.
- All connectors should be situated on one side or one corner of the board.
- There should be no high-speed circuitry between I / O connectors.
- Critical signal or clock traces should be placed between power and ground planes.
- Select active digital parts with maximum acceptable off-chip transition times.
- All off-board communications from a single device should be routed through the same connector.
- High-speed (or prone) traces should be routed at least 2X from the bottom of the board, where X is the distance between the track and its present route of exchange.
- Differential signal trace pairs should be routed together and maintained at the same distance from any strong plane.
- All power (e.g. voltage) planes that refer to the same return power (e.g. ground) plane should be routed to the same layer.
- The separation of any two power planes on a specified layer should be at least 3 mm.
- No traces should be used on the board with power and ground plane to link to power or ground. Connections should be produced using a via adjacent to the component’s power or ground pad.
- If the design has more than one ground plane layer, any ground connection at a specified place should be produced to all ground layers at that place.
- In the ground plane, there should be no gaps or slots.
- All power or ground conductors on the board that are in touch with (or coupled to) the chassis, wires or other useful antenna components should be linked together at high frequencies.
It is also essential to define the prospective sources of noise, transmitters and coupling routes with each model you assess. The best design will not be the one that meets most of the rules. The best design is the one that meets all requirements with the lowest price and the greatest reliability.
PCB layout guidelines for EMC- Summary
The design of devices that produce small electromagnetic interference is not a mystery but needs the use of well-known engineering methods. The design starts with the choice of semiconductor parts which generate low electromagnetic radiation. However, in many instances, other criteria, such as the necessary performance of the semiconductor component, may be at odds with low interference. The primary job is to design a PCB that eliminates antennas that can emit electromagnetic energy. Even if this can sometimes be accomplished, it is necessary to avoid big loops of signals and associated ground-return lines carrying high frequencies. Careful placement of the integrated circuits is therefore crucial in order to obtain short interconnecting lines. A close ground grid is put over the printed circuit board in the next step. This grid guarantees that the return lines are near to the signal lines, maintaining the efficient antenna region small. This function is provided by a ground plane in a multilayer board. Low electromagnetic emission with low design effort can be accomplished by using this method. However, some cost-sensitive applications only enable two-layer PCBs. In this case, however, the cautious design offers almost the same efficiency as a multilayer board. Finally, filtering critical lines, such as the supply line, guarantees that high-frequency currents do not leave the PCB.
There may be dozens, hundreds, or even thousands of circuits on a typical circuit board. Each circuit is a prospective source of energy that could eventually be unintentionally connected to other circuits or devices. It is more essential to define, isolate and suppress adverse effects in order to attain the objectives of the EMC. The PCB layout guideline given in this paper is quite prevalent in all designs, and it is the task of the engineer to apply industry-specific rules to obtain the best possible result. Some guidelines based on experience may be invaluable to the developer of the board. However, using the guidance without knowing the physics behind it will lead to wasted effort and non-functional boards. Understanding the basic physics behind each and every guideline applied is very important. Identifying potential sources of noise, antennas and coupling paths with each design is important.